1. Field
The present disclosure relates generally to digital systems, and more specifically, to a scalable bus structure.
2. Background
Computers have revolutionized the electronics industry by enabling sophisticated processing tasks to be performed with just a few strokes of a keypad. These sophisticated tasks involve an incredibly high number of complex components that communicate with one another in a fast and efficient manner using a bus. A bus is a channel or path between components in a computer.
Many buses resident in a computer have traditionally been implemented as shared buses. A shared bus provides a means for any number of components to communicate over a common path or channel. In recent years, shared bus technology has been replaced to a large extent by point-to-point switching connections. Point-to-point switching connections provide a direct connection between two components on the bus while they are communicating with each other. Multiple direct links may be used to allow several components to communicate at the same time.
A typical computer includes a microprocessor with system memory. A high bandwidth system bus may be used to support communications between the two. In addition, there may also be a lower performance peripheral bus which is used to transfer data to lower bandwidth peripherals. In some cases, there may also be a configuration bus which is used for the purpose of programming various resources. Bridges may be used to efficiently transfer data between the higher and lower bandwidth buses, as well as provide the necessary protocol translation. Each of these buses have been implemented in the past with different protocols because of the wide variation in performance requirements between them.
The use of multiple bus structures in a computer has provided a workable solution for many years. However, as area and power emerge as the major design considerations for integrated circuits, it is becoming increasingly desirable to reduce the complexity of the bus structure.